JNCASR 100 Gbit/s Terahertz Silicon Chip Breakthrough

Researchers at the Jawaharlal Nehru Centre for Advanced Scientific Research (JNCASR), an autonomous institute under the Department of Science and Technology (DST), have developed an advanced silicon chip capable of transmitting terahertz waves through engineered structural barriers with negligible signal attenuation, reaching data speeds of up to 100 gigabits per second (Gbit/s). Designed to underpin future sixth-generation (6G) wireless communication infrastructure, the innovation utilizes principles of topological photonics to construct a silicon photonic crystal featuring triangular apertures arranged in a graphene-like honeycomb lattice. This topological architecture guides terahertz waves securely along designated boundaries while resisting backscattering—limiting signal loss to just 1–2% across a single barrier and 2–3% across two consecutive barriers, substantially outperforming conventional waveguides that suffer severe transmission degradation under similar physical obstructions. Led by JNCASR Assistant Professor Dr. Abhishek Kumar and published in the journal Advanced Materials, the research team fabricated three distinct architectures using high-resistivity silicon compatible with mainstream semiconductor manufacturing workflows: a double-barrier waveguide, an omega-shaped structure featuring four sharp bends and a central barrier, and a power splitter with an integrated barrier in one branch. Operational testing demonstrated data transmission speeds of 48 Gbit/s for the double-barrier waveguide and 60 Gbit/s for the omega-shaped circuit, while the power splitter achieved 100 Gbit/s utilizing QAM-32 modulation. These breakthroughs lay the groundwork for ultra-compact, monolithic terahertz circuits capable of efficiently routing and splitting high-bandwidth 6G signals on a single silicon chip. KAYNES